Design and Test Techniques for Very Large Scale Integration and Wafer Scale Integration (IEE computing series)
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DESIGN AND TEST TECHNIQUES FOR VLSI AND WSI CIRCUITS (1989)
EN HC USISBN: 9780863411656 bzw. 0863411657, in Englisch, Peter Peregrinus Ltd on Behalf of the Institution of Electrical Engineers, gebundenes Buch, gebraucht.
Lieferung aus: Vereinigtes Königreich Großbritannien und Nordirland, Shipping costs to: USA.
Von Händler/Antiquariat, DISCOVERY BOOKSHOP.
London: Peter Peregrinus Ltd on Behalf of the Institution of Electrical Engineers, 1989. IEE Computing Series 15. HARDCOVER WITH DUST JACKET, 315 pages, all clean and in nice condition, light use and a little light shelf wear.. Hardcover. Good/Good. 8vo - over 7¾" - 9¾" tall.
Von Händler/Antiquariat, DISCOVERY BOOKSHOP.
London: Peter Peregrinus Ltd on Behalf of the Institution of Electrical Engineers, 1989. IEE Computing Series 15. HARDCOVER WITH DUST JACKET, 315 pages, all clean and in nice condition, light use and a little light shelf wear.. Hardcover. Good/Good. 8vo - over 7¾" - 9¾" tall.
2
Symbolbild
Design and Test Techniques for Very Large Scale Integration and Wafer Scale Integration (1989)
EN HCISBN: 9780863411656 bzw. 0863411657, in Englisch, Institution of Engineering and Technology, gebundenes Buch.
Lieferung aus: Vereinigtes Königreich Großbritannien und Nordirland, Shipping costs to: USA.
Von Händler/Antiquariat, Anybook Ltd.
Institution of Engineering and Technology, 1989. This is an ex-library book and may have the usual library/used-book markings inside.This book has hardback covers. In good all round condition. No dust jacket.
Von Händler/Antiquariat, Anybook Ltd.
Institution of Engineering and Technology, 1989. This is an ex-library book and may have the usual library/used-book markings inside.This book has hardback covers. In good all round condition. No dust jacket.
3
Design and Test Techniques for Vlsi and Wsi Circuits (Computing Series No 15) (1989)
EN HC USISBN: 9780863411656 bzw. 0863411657, in Englisch, 320 Seiten, Inst of Engineering & Technology, gebundenes Buch, gebraucht.
Lieferung aus: Vereinigte Staaten von Amerika, Usually ships in 1-2 business days, Real shipping costs can differ.
Von Händler/Antiquariat, anybookltduk.
This book provides an up-to-date view of VLSI and WSI design and test methodologies, combining an introduction to the topics covered with an indication of current research directions and results. The coverage is thus suitable for undergraduates studying microelectronic systems design, for postgraduate researchers and for graduate engineers and managers seeking an overview or introduction to semi- and full-custom large-scale chip design. The contributions have been carefully chosen to take the reader from an introductory treatment of the gate array design route, very typically favoured by new entrants into the business of custom chip design, through a study of more ambitious design tools that allow the user to progress naturally to full-custom design. Having establihsed the style of design tools that are either in current use, or which are likely to set the future style of chip design packages, the book moves on to review the related fields of design-for-testability and fault tolerant VLSI design. The final section of the book deals with the concept of Wafer Scale Integration - WSI - which offers very exciting opportunities for devices of large system-scale complexities. Hardcover, Label: Inst of Engineering & Technology, Inst of Engineering & Technology, Product group: Book, Published: 1989-12-01, Studio: Inst of Engineering & Technology.
Von Händler/Antiquariat, anybookltduk.
This book provides an up-to-date view of VLSI and WSI design and test methodologies, combining an introduction to the topics covered with an indication of current research directions and results. The coverage is thus suitable for undergraduates studying microelectronic systems design, for postgraduate researchers and for graduate engineers and managers seeking an overview or introduction to semi- and full-custom large-scale chip design. The contributions have been carefully chosen to take the reader from an introductory treatment of the gate array design route, very typically favoured by new entrants into the business of custom chip design, through a study of more ambitious design tools that allow the user to progress naturally to full-custom design. Having establihsed the style of design tools that are either in current use, or which are likely to set the future style of chip design packages, the book moves on to review the related fields of design-for-testability and fault tolerant VLSI design. The final section of the book deals with the concept of Wafer Scale Integration - WSI - which offers very exciting opportunities for devices of large system-scale complexities. Hardcover, Label: Inst of Engineering & Technology, Inst of Engineering & Technology, Product group: Book, Published: 1989-12-01, Studio: Inst of Engineering & Technology.
4
Symbolbild
Design and Test Techniques for Vlsi and Wsi Circuits (Computing Series No 15) (1989)
EN HC USISBN: 9780863411656 bzw. 0863411657, in Englisch, Institution of Electrical Engineers, gebundenes Buch, gebraucht.
Lieferung aus: Vereinigtes Königreich Großbritannien und Nordirland, plus shipping, Shipping area: EUR.
Von Händler/Antiquariat, DSM BOOKS, MERSEYSIDE, Liverpool, [RE:3].
Like New. Refurbished. Hardcover.
Von Händler/Antiquariat, DSM BOOKS, MERSEYSIDE, Liverpool, [RE:3].
Like New. Refurbished. Hardcover.
5
Symbolbild
Design and Test Techniques for Vlsi and Wsi Circuits (Computing Series No 15) (1989)
EN HC USISBN: 9780863411656 bzw. 0863411657, in Englisch, Institution of Electrical Engineers, gebundenes Buch, gebraucht.
Lieferung aus: Vereinigte Staaten von Amerika, plus shipping, Shipping area: DOM.
Von Händler/Antiquariat, ExtremelyReliable, TX, Richmond, [RE:3].
Hardcover.
Von Händler/Antiquariat, ExtremelyReliable, TX, Richmond, [RE:3].
Hardcover.
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